The present invention relates in general to the field of memory devices. More particularly, the present invention relates to an apparatus and method for utilizing partially defective memory devices which in the past would have been scrapped because of their defects. Still more particularly, the present invention relates to an apparatus and method for utilizing partially defective 16K dynamic RAMs which are characterized as having all faults within a contiguous address space which is one sixteenth of the total device address space.
The use of solid state memory devices has proliferated at a rate that has outpaced the increase in production capability for such devices. As a result, the demand for selected devices far outstrips supply and premium prices are demanded for such devices. The problem is particularly acute in the supply of the 16K dynamic RAMs utilized in computer memories, with annual shortfalls of multiple millions of units predicted in the near term.
Part of the supply problem is due to the fact that a large portion of the 16K dynamic RAM chips produced contain some defect(s) which make them unusable. In the prior art, methods to allow the use of some partially defective RAM chips have been recognized. One of these methods relies on a low density of faulty chip locations to permit error correction. Its disadvantage lies in the fact that error correction requires an overhead of memory storage which is dependent on the number of bits in a word and the number of errors it is desired to be able to correct.
Another method depends on defining the faulty locations once a memory board is fully assembled, and installing logic (such as a PROM) to allow mapping of those locations. This method suffers from the fact that definition of faulty locations when a board is assembled is inadequate due to the difficulty of reproducing worst case physical and electrical environments at a board test station. Further, permitting random faulty locations requires considerable overhead logic to permit mapping. For instance, one PROM location may be required for each board address.
The distribution of faulty locations in dynamic RAM chips is a function of, amongst other things, wafer defect density, thin oxide integrity, lithography defects, and process tolerances. The faults may be either hard, as in the case of a short circuit, or marginal, as in the case of a poor sense amplifier. In a typical process, about 60% of the 16K devices that are mostly functional may be classified as having all faults within a contiguous address space which is one sixteenth of the total device address space. It is a general object of the present invention to take advantage of the latter mentioned characteristic of semiconductor dynamic RAM manufacturing techniques by providing a low cost apparatus and method of utilizing some of these partially defective memory devices to form a memory system which appears to be faultfree.
It is another object of the present invention to provide an apparatus and method of utilizing partially defective memory devices wherein error correction systems are not required, and therefore may be added, as desired, to perform their normally intended function of data integrity improvement.
It is still another object of the present invention to provide an apparatus and method of utilizing partially defective memory devices which includes a mapping capability requiring minimum logic to implement and one wherein the mapping function is defined by the specification of the memory devices used.
It is yet another object of the present invention to provide an apparatus for utilizing partially defective 16K dynamic RAMs wherein no additional forms of memory, such as PROM, are required to implement the apparatus.
It is a further object of the present invention to provide a practical, volume-production oriented mapping system to permit use of memory devices with specific faulty areas.
It is an additional object of the present invention to provide a mapping system to permit use of partially defective and therefore inexpensive memory devices, any and all of said partially defective memory devices being replaceable with faultfree memory devices upon failure in the field.
It is still a further object of the present invention to provide a mapping system to permit use of partially defective memory devices wherein a portion of a mapping memory device is automatically allocated for each of the partially defective memory devices.
These and other objects, features and advantages of the present invention will become more apparent from the detailed description of the preferred embodiment when read in conjunction with the drawings.